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Introduction to Logic Synthesis using Verilog HDL

Robert B. Reese

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Autorius Robert B. Reese
Leidimo metai 2007 m.
Puslapių skč. 75 psl.
Viršelis Minkštas viršelis
ISBN 9783031797422

Introduction to Logic Synthesis using Verilog HDL

Discover the essential guide to digital design with Introduction to Logic Synthesis using Verilog HDL by Robert B. Reese. Published by Springer International Publishing AG in 2007, this informative paperback spans 75 pages and provides a comprehensive introduction to writing precise Verilog descriptions for digital systems.

In this book, Reese expertly explains the process of synthesizing digital systems into netlists that exhibit optimal characteristics, making it an invaluable resource for both students and professionals in the field of electronics and computer engineering. Whether you're looking to enhance your skills or deepen your understanding of logic synthesis, this title is a must-have addition to your technical library. Elevate your knowledge and practical skills with this authoritative text on Verilog HDL.

Book cover of: Introduction to Logic Synthesis using Verilog HDL. By: Robert B. Reese

Introduction to Logic Synthesis using...

Parastā cena €30,30
Akcijas cena €30,30 Parastā cena €31,24